1、

An IP core based-on FPGA for high-efficiency inner-product operation is implemented, in which a distributed arithmetic algorithm was introduced to compute inner-product.

基于现场可编程门阵列器件,采用分布式运算算法,实现了一种面积有效内积运算IP核的设计。

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2、

The application of the high order FIR digital filter with FPGA shows that the realizing structure and the tradeoff of distributed arithmetic will affect the processing speed and the hardware cost.

在滤波器实现方面主要以可编程门阵列(FPGA)为目标器件,给出了实现结构对处理速度和硬件资源占用方面的影响及高阶FIR滤波器采用分布式(DA)算法的具体实现方法。

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3、

In order to examine our system framework, we developed a distributed arithmetic, provided the solutions of this arithmetic in J2EE, mobile agent and our AT-DAS.

为了验证系统的有效性和可实现性,我们设计了一个分布式算法,并且在J2EE、移动Agent和我们AT-DAS中分别给出了这个算法的解决方案。

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4、

In this thesis, ROM decomposition technology, offset-binary coding technology and symmetric architecture were used to improve the Serial Distributed Arithmetic FIR structure by ROM size reduction.

本文对分布式算术算法进行了深入研究,运用ROM分解技术、偏移二进制编码(OBC)以及线性相位FIR滤波器的对称结构使得ROM规模减小,实现了串行分布式算法结构的改进。

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5、

This paper introduces a theory of Distributed Arithmetic which could realize the multiplication of constant coefficients efficiently, and presents a method of FIR filter design using look up table based on FPGA.

本文介绍了能高效实现固定常数乘法的分布式算法原理,给出了在FPGA中用查找表实现FIR滤波器的算法设计,并以一个16阶低通滤波器为例说明了设计过程。

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6、

This paper introduces various arithmetic, according to the characteristics of image manipulation and is easy to the target of the hardware realization, based on the distributed arithmetic to realize the FPGA design.

介绍DCT的各种快速算法,根据图象处理的特点和易于硬件实现的目标选择基于分布算法(Distributed Arithmetic-DA)的DCT结构来实现FPGA设计。

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7、

The Realization and Arithmetic Development of Task Scheduling in Distributed System

分布式系统任务调度的实现及算法与发展

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