cache memory

OProfile analysis: Cache memory utilization problem

Oprofile分析：高速缓存利用率问题

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Reserch on High Performance and Low Power Cache Memory Architectures

体系结构级高性能低功耗Cache的研究

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Bytes of cache memory in use by the server for burst buffers

服务器用于快速缓冲区的高速缓存字节数

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In this paper, we briefly survey architectural techniques for high performance and low power cache memory.

着重讨论了体系结构级的高性能低功耗Cache存储器的相关技术。

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This directive specifies the size in bytes of the in-memory cache associated with each open index file.

本指令指定了与每个打开的索引文件相关联的内存缓存的字节数。

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The Effects of Locality of Reference in Cache Memory System

访问局部性原理在Cache存储系统中的作用

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Almost all modern machines have enough cache memory to profit from LAPACK's design.

几乎所有现代的机器有充足的隐藏所记忆从LAPACK' s的设计有益于.

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This improves the performance characteristics of the system memory cache, and, in turn, the application itself.

这有助于改进系统内存缓存的性能特征，从而提高应用程序本身的性能。

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Because memory logically divided on buffer or cache memory and firmware memory.

因为从逻辑上划分内存缓冲区或高速缓存内存和固件的内存。

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BUFFER CAPACITY Experimental study of optical parallel cache memory arrays

光学并行高速缓冲存储列阵的实验研究

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When the memory cache region becomes full, LRU removes the least recently used cached data first.

当内存缓存区域满时，LRU会首先删除最近最少使用的缓存数据。

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Based on the embedding in the local one-dimensional search algorithm for hybrid particle swarm optimization the cache memory parameters were optimized, and was proved its applicability.

在此基础上提出嵌入局部一维搜索的混合粒子群优化算法对内存缓存的开启参数进行了优化，并证明了其适用性。

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Cache memory control communication

高速缓冲存储器控制通信

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When the CPU reads data from main memory, a copy of this data is stored in the cache memory.

当CPU从主内存中读取数据时，一份数据拷贝将被存储在高速缓存中。

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Now, SRAM can be designed using full-custom, which can improve the performance of SRAM and overcome the bottle-neck problem induced by unmatchable speed when micro processor access to the cache memory.

目前，通常采用全定制方法对SRAM进行专门设计和优化，使SRAM性能得到进一步提高，以缓解微处理器访问高速缓存时因速度不匹配而引起的访存瓶颈问题。

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It works by retrieving the data row information that the reader transaction needs from the DB2 logs-usually from the log's memory cache, which is very fast.

它采用的方法是从DB2日志（常常是从非常快速的日志内存缓存）中获取读者事务需要的数据行。

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Finally there is the main memory which relative to the external cache memory is very slow.

这样,相对外部高速缓存存储器,主存的速度非常慢.

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This article introduces the working principle of Cache memory system and its function in raising the system perormance;

简单介绍了Cache存储系统的工作原理以及它在提高系统性能方面的作用；

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NET executive process, efficiency and cache memory technique, introduces performance optimization methods to exploit Web application program with ASP. NET.

NET的执行过程、效率以及缓存技术，介绍了利用ASP.NET开发Web应用程序的性能优化方法。

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The digital video signals bit plane separation strategy is applied in the circuit design, and the sub-field writing-in and sub-area readout to the cache memory method is used.

该电路的设计，应用了数字视频数据信号位面分离的策略，采用了分场写入、分区读出缓存存储器的方法。

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This high speed cache memory eliminates the CPU wait state.

这种高速缓存降低了CPU等待时间。

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Elbot : OK, I will press the reset button on my cache memory unit.

那好, 我等下会重置我的缓存单元.

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Theoretical Use of Cache Memory in Side-Channel Attack and Simulation on PC

Cache在旁路攻击中的理论应用及其仿真实现

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Cache Memory Bad , Do not Enable.

高速缓存损坏, 不能使用.

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This paper firstly studied memory cache feature and described the messaging system design ideas. Then do the process to realize the design idea.

本文首先研究了内存缓存功能在短信系统上的设计思路，并根据其进行了短信内存缓存功能设计实现。

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Design of high speed and large scale FIFO cache memory

高速大容量FIFO缓冲存储器设计

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In a traditional application server environment, cache memory is contained within each application server instance.

在传统应用程序服务器环境中，缓存内存包含在每个应用程序服务器实例中。

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Analysis of Computer Cache Memory Architecture

计算机高速缓冲存储器体系结构分析

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Bad cache memory. An error in the level 2 cache memory.

高速缓冲存储器损坏. 二级高速缓冲存储器有错误.

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An error in the level 2 cache memory.

二级高速缓冲存储器有错误.

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